Field of the Invention
The present invention relates to an array substrate and a liquid crystal display panel including the array substrate, and more particularly, to a liquid crystal display panel capable of performing an inspection before mounting an integrated circuit (IC) chip (or a large scale integrated (LSI) circuit chip) in a chip-on-glass (COG) liquid crystal display panel without expanding a frame region.
Description of the Background Art
In COG liquid crystal display panels, array substrates including liquid crystal driving wires have extending portions to be longer than color filter substrates disposed opposite to the array substrates. The extending portions include regions in which IC chips are mounted. Further, various wires are led to the IC chip mounted regions to form bump terminals that are connected with bump terminals of the IC chips. Thus, the IC chips control driving of liquid crystals.
In the COG liquid crystal display panels, the presence or absence of breaks in the various wires or short circuits between the wires is inspected in a manufacturing step. The wires led to the IC chip mounted regions are used to perform this inspection before the IC chips are mounted on the array substrates. More specifically, the inspection is typically performed by using a so-called pin probe mode that contacts conductive contact pins to the bump terminals provided on the various wires.
However, contact of the conductive contact pins with the bump terminals may scratch the bump terminals, and the contact thereof with the adjacent terminals may cause electrolytic corrosion of the bump terminals. Thus, a method for solving the above-mentioned problems is considered (for example, see Japanese Patent Application Laid-Open No. 2008-233730).
A liquid crystal display disclosed in Japanese Patent Application Laid-Open No. 2008-233730 includes terminal electrode wires further from an output electrode pad (bump terminal) connected with scanning lines or signal lines and includes inspection terminals formed at end portions of the terminal electrode wires. The inspection electrode pad includes the adjacent inspection terminals arranged alternately in two rows.
However, with requests for a narrow frame and a low cost of a liquid crystal display panel in recent times, a multiple-output IC chip is applied for the purpose of reducing the size and the number of IC chips, which also causes an IC chip mounted region to be narrow. Consequently, a special-purpose inspection terminal is hardly provided.
Then, signal lines or scanning lines that are common for an inspection are provided in a non-display region of a liquid crystal display panel, each of signal lines or each of scanning lines in a display region is connected with an inspection wire through an inspection thin-film transistor, and an inspection terminal is provided in each of the signal lines or each of the scanning lines that are common for the inspection. This method capable of easily performing an inspection at low cost with few inspection terminals that are not in contact with bump terminals in an IC chip mounted region is known (for example, see Japanese Patent Application Laid-Open No. 2002-98992).
However, in an inspection in the liquid crystal display panel disclosed in Japanese Patent Application Laid-Open No. 2002-98992, a break or a short circuit in the signal line or the scanning line or a point defect in a display region is found after an array substrate has been bonded to a color filter substrate (hereinafter may be referred to as a CF substrate) being a counter substrate and a display has been checked. In other words, a loss cost of the non-defective CF substrate occurs. A recent repair technology is brought into full use to repair the break or the defective portion, but the signal lines or the scanning lines are collectively connected with the inspection wire, so that an address of the faulty portion cannot be detected.
In the liquid crystal display panel disclosed in Japanese Patent Application Laid-Open No. 2002-98992, the inspection terminal is newly provided on each of the signal lines or each of the scanning lines and needs to be provided in a frame region because the IC chip mounted region is narrow. In this case, it is feared that corrosion of the terminal or an entry of static electricity causes display failures. Thus, the inspection terminals need to be disposed in a seal and close to the display region. However, the frame region is expanded by the area of the seal including the inspection terminals, so that it is difficult to narrow the frame. When the inspection terminals are disposed close to the display region, an increase in an area that exposes each potential from the inspection terminal in each of the signal lines or each of the scanning lines causes accumulation of electric charge on the counter substrate side, affecting alignment of liquid crystals in the display region. Thus, it is feared that peripheral unevenness of the display occurs.